Achronix Speedster22i 10G/40G/100G Ethernet Manuel d'utilisateur Page 74
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74 UG029, September 6, 2013
4
Remote Fault
RO
Read Only Bit always set to ‘0’. The PCS does not
implement a PHY specific remote fault detection optional
function.
5
Auto
Negotiation
Complete
RO
Read Only Bit set to ‘1’ to indicate that the Auto
Negotiation process is completed and that the Auto
Negotiation control registers are valid. Set to ‘0’ if the
Auto Negotiation process is not completed or if Auto
Negotiation is disabled.
6
Reserved
RO
7
Reserved
RO
-
8
Extended
Status
RO
Read Only bit always set to ‘0’ to indicate that the PCS
does not implement an extended status register.
9
100Base-T2
Half Duplex
RO
Read Only bit set to ‘0’ to indicate that the PCS does not
support 100Base-T2 operation.
10
100Base-T2
Half Duplex
RO
11
10Mbps Half
Duplex
RO
Read Only bit set to ‘0’ to indicate that the PCS does not
support 10Mbps operation.
12
10Mbps Full
Duplex
RO
13
100Base-X
Half Duplex
RO
Read Only bit set to ‘0’ to indicate that the PCS does not
support 100Base-X operation.
14
100Base-X
Full Duplex
RO
15
100Base-T4
RO
Read Only bit set to ‘0’ to indicate that the PCS does not
support 100Base-T4 operation.
Table 39 – (SGMII PCS) DEVICE/PARTNER_ABILITY Register Description -
1000Base-X mode
Bit(s)
Name
Type
Description
0 to 4
Reserved
RW
-
5
FD
RW
Full Duplex Support. Set to ‘1’ when the device advertises that it
supports Full Duplex Mode of operation.
The device-ability (advertisement) register reset value sets the
bit to 1 indicating full duplex operation.
6
HD
RW
Half Duplex Support. Set to ‘1’ when the device advertises that
is supports Half Duplex Mode of operation.
7
PS1
RW
Advertise that the PCS supports pause on both transmit and
receive. PS1 (Pause) indicates pause capability. PS2
(ASM_DIR) indicates pause asymmetry.
Refer to IEEE802.3 Clause 37.2.4.2 for pause resolution.
The device-ability (advertisement) register reset value sets both
bits to 1 indicating full pause support in both directions.
8
PS2
RW
9 to
11
Reserved
RW
-
12
RF1
RW
Remote fault condition advertise:
RF1.RF2:
0.0: no error; normal operation
0.1: offline; device going offline
1.0: link failure;
1.1: autonegotiation error;
13
RF2
RW
14
ACK
RO
Acknowledgement bit used during autonegotiation. Setting of
- Speedster22i 10/40/100 1
- Gigabit Ethernet User Guide 1
- Copyright Info 2
- Table of Contents 3
- Table of Figures 7
- Overview 8
- Functional Description 10
- Interface Signal List 12
- Global Signals 13
- Receive FIFO Interface 13
- Transmit FIFO Interface 15
- PMA TX/RX Interface 16
- Signal Name 17
- Serial Bus Interface 18
- SerDes (off-chip) Interface 19
- Transmitted Frame Status 19
- Timestamp Timer 19
- MAC/PCS Status Indications 20
- Implementation with ACE 21
- Simulation 24
- .vp or .ve file extenstion 25
- .vma file extenstion 25
- Clock Distribution 26
- Reset Considerations 28
- Fabric FIFO Interface 29
- Credit Handling 32
- Data Structure 33
- Valid Bytes 34
- Byte Number 36
- Frame Status 42
- FIFO Thresholds 43
- FIFO nearly full 44
- FIFO has at least 44
- FIFO is full 44
- Flow Control Interface 45
- Transmit Pause/PFC Operation 47
- Receive Pause/PFC Operation 47
- Write Operation 50
- PMA Management Interface 51
- Power State Sequencing 53
- Auto-Negotiation 54
- Function 55
- Related 55
- Registers 55
- IEEE 1588 Timestamping 58
- Channelized MAC Registers 61
- Transmitted 64
- Bit Name 70
- 1000Base-X / SGMII PCS 71
- Global Registers 77
- Channelized PCS Registers 79
- Auto-Negotiation Registers 87
- PMA Registers 93
- 1A[7:4] 95
- 1B[3:0] 95
- 1B[6:4] 95
- 1C[7:3] 95
- +1 is 4’h9 96
- 51[3:2] 97
- 53[2:2] 97
- 53[3:3] 97
- 8[6:6] 99
- 21[5:1] 99
- 23[5:1] 99
- 25[2:0] 99
- UG029, September 6, 2013 101
- Statistics Data Registers 102
- Receive Statistics Vector 103
- Description 104
- Transmit Statistics Vector 105
- References 107
- Revision History 108
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