Achronix Speedster22i 10G/40G/100G Ethernet Manuel d'utilisateur Page 43
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- Table des matières
- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
UG029, September 6, 2013
43
Table 22 – Frame Status Word Bits
Bit #
Name
Description
0
LENGTH_ERROR
Set to ‘1’ if the frame has an invalid length. This can be
either a too long frame (length greater than the value
programmed in register FRM_LENGTH), or a frame which
has a different amount of payload than specified in the
frame's payload length field.
Frames below 64 octets in length are never delivered to the
FIFO interface.
1
CRC_ERROR
Set to ‘1’ if the frame was received with a CRC field that did
not match the CRC calculated by the MAC Core. The frame
is invalid.
2
PHY_ERROR
Set to ‘1’ if the frame was received with an unknown control
character. The frame is invalid.
3
FIFO_OVERFLOW
Set to ‘1’ if a FIFO overflow was detected during frame
reception. The received frame is truncated by the MAC
Core and is invalid.
4
FAULT_SEQ
Set to ‘1’ if a Sequence Error (local or remote fault) has
been received from the PHY during frame reception. The
frame is invalid.
5
STACKED_VLAN
Set to ‘1’ to indicate that the frame is a Stacked VLAN
frame. This information can be used to switch the received
frame to dedicated VLAN frames processing engines.
6
TRANSMIT_ERR
Set to ‘1’ if a transmit error control character (0xFE) has
been received from the line. The frame is invalid.
7
VLAN
Set to ‘1’ to indicate that the frame is a VLAN frame. This
information can be used to switch the received frame to
dedicated VLAN frames processing engines.
23:8
PAYLOAD_LEN
Frame payload length in bytes or type information. The
copied value of the frame's length/type field. For VLAN
frames the value immediately following the 4-octet VLAN
tag is copied.
FIFO Thresholds
The Core implements programmable FIFO thresholds that provide the possibility to
dynamically change the FIFO operation and fixed Almost Full and Almost Empty thresholds
for FIFO overflow / underflow protection.
FIFO Sections Behavior (Watermarks)
The FIFO logic offers to set high- and low-watermarks by setting the configuration registers
RX_FIFO_SECTIONS and TX_FIFO_SECTIONS. The sections are defined in steps of segment
data words (10G: 32-bit, 40G: 128-bit, 100G: 384-bit).
tx/rx_section (section available) defines a low-watermark that is used to assert an
internal signal when this amount of data is available in the FIFO.
tx/rx_section_e (section empty) defines a high-watermark that is used to de-assert an
internal signal when the FIFO is filled to this level and above.
- Speedster22i 10/40/100 1
- Gigabit Ethernet User Guide 1
- Copyright Info 2
- Table of Contents 3
- Table of Figures 7
- Overview 8
- Functional Description 10
- Interface Signal List 12
- Global Signals 13
- Receive FIFO Interface 13
- Transmit FIFO Interface 15
- PMA TX/RX Interface 16
- Signal Name 17
- Serial Bus Interface 18
- SerDes (off-chip) Interface 19
- Transmitted Frame Status 19
- Timestamp Timer 19
- MAC/PCS Status Indications 20
- Implementation with ACE 21
- Simulation 24
- .vp or .ve file extenstion 25
- .vma file extenstion 25
- Clock Distribution 26
- Reset Considerations 28
- Fabric FIFO Interface 29
- Credit Handling 32
- Data Structure 33
- Valid Bytes 34
- Byte Number 36
- Frame Status 42
- FIFO Thresholds 43
- FIFO nearly full 44
- FIFO has at least 44
- FIFO is full 44
- Flow Control Interface 45
- Transmit Pause/PFC Operation 47
- Receive Pause/PFC Operation 47
- Write Operation 50
- PMA Management Interface 51
- Power State Sequencing 53
- Auto-Negotiation 54
- Function 55
- Related 55
- Registers 55
- IEEE 1588 Timestamping 58
- Channelized MAC Registers 61
- Transmitted 64
- Bit Name 70
- 1000Base-X / SGMII PCS 71
- Global Registers 77
- Channelized PCS Registers 79
- Auto-Negotiation Registers 87
- PMA Registers 93
- 1A[7:4] 95
- 1B[3:0] 95
- 1B[6:4] 95
- 1C[7:3] 95
- +1 is 4’h9 96
- 51[3:2] 97
- 53[2:2] 97
- 53[3:3] 97
- 8[6:6] 99
- 21[5:1] 99
- 23[5:1] 99
- 25[2:0] 99
- UG029, September 6, 2013 101
- Statistics Data Registers 102
- Receive Statistics Vector 103
- Description 104
- Transmit Statistics Vector 105
- References 107
- Revision History 108
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