Achronix Speedster22i User Macro Guide Manuel d'utilisateur télécharger pdf (Page 223)

PLL/DLL Clock Generators ACX_CLKGEN

Speedster Macro Cell Library

www.achronix.com PAGE 206

dyn_phase3 => "0",

byp_clkdiv3 => "1",

high_cnt3 => "0000000000",

low_cnt3 => "0000000000",

half_cycle3 => "0",

clken_out3 => "0")

port map (

refclk => user_refclk,

fbclk => user_fbclk,

rstn => user_rstn,

outphrstn => user_outphrstn,

core_clken => user_core_clken,

phase_inc => user_phase_inc,

clkout => user_clkout,

ick_dspll_sif_clk => user_ick_dspll_sif_clk,

ick_dspll_sif_rstn => user_ick_dspll_sif_rstn,

ick_sbus_data => user_ick_sbus_data,

ick_sbus_req => user_ick_sbus_req,

ock_sbus_ack => user_ock_sbus_ack,

ock_sbus_data => user_ock_sbus_data,

pll_lock => user_pll_lock);

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Achronix Speedster22i User Macro Guide Manuel d'utilisateur Page 223