Achronix Speedster22i User Macro Guide Manuel d'utilisateur Page 136

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Memories BRAM80KFIFO
Speedster22i Macro Cell Library
AchronixSemiconductorProprietary PAGE 119
BRAM80KFIFO
80k-bit FIFO Memory
BRAM80KFIFO
dout[31:0]
doutp[3:0]
full
read_err
wrcount[16:0]
din[31:0]
dinp[3:0]
wrrst
rdrst
outregce
dinpx[3:0]
wren
rden
rstreg
doutpx[3:0]
empty
almost_empty
almost_full
write_err
rdcount[16:0]
wrclk
rdclk
Figure 6-7: Logic Symbol
The BRAM80KFIF
O implements a 80kbit FIFO memory block utilizing the embedded
BRAM80K blocks with dedicated pointer and flag circuitry.The BRA M80KFIFO can be
configuredtosupportavarietyofwidthsanddepths,rangingfrom2kdepthwith40bitdata
downto64kdepthwith1bitdata.Thereadandwr
iteclocksmaybeeithersynchronousor
asynchronouswithrespecttoeachother.Iftheuserreadandwriteclocksarethesameclock,
the user may set the sync_mode to 1’b1 to enable faster and synchronous generation of the
statusflagsandFIFOpointeroutputs.
Figure 6-8: BR
AM80KFIFO Block Diagram
BRAM80K
Register
dout,
Memory
Write
Pointer
Logic
Read
Pointer
Logic
Memory Control /
Flag Generation
Logic
din,
(optional)
wren
wrrst
wrclk
rdrst
rdclk
outregce
rstreg
doutp,
doutpx
dinp,
dinpx
wrcount
rdcount
full
empty
almost_full
almost_empty
write_err
read_err
rden
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