Achronix ACE Version 5.0 Manuel d'utilisateur

ACE User GuideFor ACE Version 5.0UG001 v5.0 - 5th December 2012http://www.achronix.com

CONTENTS CONTENTS5.53 get extra pipeline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3265.54 get fabricdb

Editors Chapter 3. ConceptsSerDes Configuration EditorThe SerDes Configuration Editor provides a graphical wizard for creating a SerDes IP configuration

Editors Chapter 3. ConceptsNOTE:Lanes which are not available in the current package/configuration will be grey (disabled)in the diagram.Module Diagram

Editors Chapter 3. ConceptsFigure 3.50: Module Diagram – SerDes Configuration EditorUG001 Rev. 5.0 - 5th December 2012 http://www.achronix.com 90

Editors Chapter 3. ConceptsOverview PageThis Overview page contains the top-level, global properties that govern the structure and baseconfiguration of

Editors Chapter 3. ConceptsOverview Page OptionsOptionDescriptionStandardSpecifies the transmission standard to be used.(1)Number ofLanesSets the numbe

Editors Chapter 3. ConceptsPMA Settings PageAllows the user to select a uniform or lane-based PMA.Figure 3.52: PMA Settings Page – SerDes Configuration

Editors Chapter 3. ConceptsRx PMA Equalization PagesThese pages allow the customization of the PMA equalization settings of the SerDes. Depending upon

Editors Chapter 3. ConceptsHigh Freq AGC DC GainRx AGC high frequency DC gainHigh Freq AGC AC BoostRx AGC high frequency AC boostDFE Pulse-shaping Tap

Editors Chapter 3. ConceptsRx PMA PLL PageThis page allows customization of the Rx PLL settings of the SerDes. Depending upon the setting of ”Enablela

Editors Chapter 3. ConceptsTx PMA Driver PageThis page allows the customization of the Tx PMA Driver settings for the SerDes. Depending upon whetherth

CONTENTS CONTENTS5.92 remove path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3395.93 remove project

Editors Chapter 3. ConceptsTx User Control from Fabric YControl PMA Transmit de-emphasis from fabricPrecursor Bit Amplitude(mV)((Cursor Level)+3-2*(Pr

Editors Chapter 3. ConceptsTx PMA PLL PageThis page allows the customization of the Tx PMA PLL settings for the SerDes. Depending upon whetherthe opti

Editors Chapter 3. ConceptsPCS Settings PageThe PCS Settings page allows the user to configure the granularity level of Tx/Rx physical coding sublayer(

Editors Chapter 3. ConceptsRx PCS Settings PageThese pages allow the customization of the Rx PCS settings of the SerDes. Depending upon whether”Enable

Editors Chapter 3. ConceptsRx PCS Settings Page OptionsOptionDescriptionDecoderPCS Decoder SelectionReceive Symbol SwapSwap upper word and lower word

Editors Chapter 3. ConceptsRx PCS Symbol Alignment PageThese pages allow the customization of the Rx PCS Symbol Alignment settings of the SerDes. Depe

Editors Chapter 3. ConceptsRx PCS Symbol Alignment Page OptionsOption DescriptionSymbol Alignment Mode Symbol alignment modesAutomatic Symbol Alignmen

Editors Chapter 3. ConceptsTx PCS Settings PageThese pages allow the customization of the Tx PCS settings of the SerDes. Depending upon whether”Enable

Editors Chapter 3. ConceptsChannel Bonding PageThis page allows the customization of the Channel Bonding settings of the SerDes.Figure 3.61: Channel B

Editors Chapter 3. ConceptsChannel Bonding Settings Page OptionsOptionDescriptionDeskew ModeDeskew operation mode: automatic, manual, or bit-slip.Desk

CONTENTS CONTENTS5.131save place and route . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3565.131.1 Usage Notes:

Editors Chapter 3. ConceptsDeskew Word 3Deskew Sequence 1 word 3Enable Alt 3Enable deskew sequence 1 alternate word 3Deskew Alt 3Deskew Sequence 1 Alt

Editors Chapter 3. ConceptsBIST Settings PageThese pages allow the customization of the BIST settings of the SerDes. Depending upon whether”Enable lan

Editors Chapter 3. ConceptsBIST Settings Page OptionsOption DescriptionEnable Loopback Enable serdes loopbackLoopbackLoopback ModeLoopback modeTransmi

Editors Chapter 3. ConceptsAdvanced PageThis page has no settings and is used to provide separation between the usual editor settings and theRegister

Editors Chapter 3. ConceptsFigure 3.64: Register Settings - Lane 0 Page (Bottom Half) – SerDes Configuration EditorUG001 Rev. 5.0 - 5th December 2012 h

Editors Chapter 3. ConceptsRegister Settings Page OptionsOptionDescriptionAHB Address FilterStart AddressSets the starting address for filtering the re

Editors Chapter 3. ConceptsVCD Waveform EditorThe VCD Waveform Editor does not allow the user to edit a VCD file, it only allows viewing. But since itr

Editors Chapter 3. ConceptsVCD Waveform Editor OptionsOptionDescriptionSignal Value TableSignal NameThe name of the signal as stored in the VCD file.Va

Editors Chapter 3. ConceptsZoom OutDecreases the zoom factor in the waveform area, decreasing the visiblelevel of detail.Zoom to MarkerPositionWithout

Views Chapter 3. ConceptsViewsViews support Editors and provide alternative presentations as well as ways to navigate the information inthe Workbench.

Conventions Used in this Guide Chapter 1. PrefacePrefaceAbout This GuideThis guide is a reference manual for the Achronix CAD Environment (ACE), used

Views Chapter 3. ConceptsProjects ViewThe Projects view provides a hierarchical view of the projects in the Workbench. From here, projects canbe added

Views Chapter 3. ConceptsAdd source filesOpens the Add Source Files dialog to allow the user toadd source netlist and constraint files to the selectedpr

Views Chapter 3. ConceptsFlow ViewThe Flow view provides a hierarchical view of flow steps that can be performed on the activeimplementation. From here

Views Chapter 3. ConceptsFlow category (running)Flow category (complete)Flow category (disabled)Flow category (error)Flow step (incomplete)Flow step (

Views Chapter 3. ConceptsOptions ViewThe Options view displays project implementation options for the active implementation. From this view,the active

Views Chapter 3. ConceptsSpeed Gradespeed grade This option allows the user to selectthe desired speed grade for thetarget device.Core Voltagecore vol

Views Chapter 3. ConceptsFanout Limitfanout limit Specifies the net fanout limitapplied when fanout control isenabled for this implementation.Resynthes

Views Chapter 3. ConceptsPost-PnR Buffer Limitmax postpnr buffer limit This limit specifies the maximumnumber of post-placement buffersthat can be inse

Views Chapter 3. ConceptsNumber of worstpathssync timing num worst Maximum number of worst paths per end point.Bitstream Generation Implementation Opt

Views Chapter 3. ConceptsChain Offset of Targetbitstream chain offset Specifies the offset of the targetdevice on the JTAG scan chain formulti-device c

Chapter 2. Getting StartedGetting StartedIntroductionThe Achronix implementation flow uses an industry standard RTL synthesis flow based on Synplify-Pro

Views Chapter 3. ConceptsResynthesis Strategy Details (within Advanced Design Preparation)ACE tries to improve QOR by resynthesizing portions of the d

Views Chapter 3. ConceptsMultiprocess ViewThe Multiprocess View ( ) allows Running Multiple Flows in Parallel and Attempting Likely Optimiza-tions Usi

Views Chapter 3. Concepts(configured in Preferences)This link, when selected, will bring up the Multiprocess View PreferencePage, allowing the user to

Views Chapter 3. ConceptsExisting ImplementationsThis radio button will update the contents of the ImplementationTable to show all existing implementa

Views Chapter 3. ConceptsFigure 3.71: Multiprocess View ScreenshotImplementation Execution States There are a number of possible Execution States (as

Views Chapter 3. ConceptsImplementation Execution States and IconsIcon Execution StateDescriptionno icon blankThis implementation has not been selecte

Views Chapter 3. ConceptsMultiprocess Run LogsThis section shows the logs for each selected implementation as they execute. A separate tab is provided

Views Chapter 3. ConceptsTcl Console ViewThe Tcl Console view provides an interactive Tcl console for the tool. All user interactions that changedesig

Views Chapter 3. ConceptsSearch ViewThe Search view provides an interface for searching the ACE design database for design objects (instances,nets, po

Views Chapter 3. ConceptsI/O Macro (Applies to ports)Instances (All instances will be under this branch of the search results.)Ports (All ports will b

ACE Quickstart Tutorial Chapter 2. Getting StartedACE Quickstart TutorialStart by copying all the files from <install dir>/Achronix/examples/quic

Views Chapter 3. ConceptsZoom To YZooms the Floorplanner view to aregion containing the itemscurrently chosen in the results list.Show in RTL YIf rele

Views Chapter 3. ConceptsSearch Results and ACE SelectionThe complete results of a search may be added to the current ACE selection set by checking th

Views Chapter 3. ConceptsSelection ViewThe Selection view provides an interface allowing a user to view and manage the current selection set.A selecti

Views Chapter 3. ConceptsIcon ActionToolbar ButtonContext MenuDescriptionZoom to selection Y YZooms the Floorplanner view to aregion containing the cu

Views Chapter 3. ConceptsShow in RTL YIf relevant data exists, opens a texteditor to the file and line numberrelevant to the chosen Selectionitem. (Ava

Views Chapter 3. ConceptsFigure 3.74: Selection View143 http://www.achronix.com UG001 Rev. 5.0 - 5th December 2012

Views Chapter 3. ConceptsCritical Paths ViewThe Critical Paths view provides a table of critical paths resulting from running timing analysis. This vi

Views Chapter 3. Conceptsdomain. The clock domains themselves are (by default) sorted from most critical to least critical.Default sort order, from mo

Views Chapter 3. ConceptsRun Post-PlaceTiming AnalysisIf selected, runs the Post-Place Timing Analysis flow step.Run Post-RouteTiming AnalysisIf select

Views Chapter 3. ConceptsThe View’s pull-down menu (to the right of the Toolbar buttons) contains some shortcuts to run the fourstages of timing analy

Perspectives Chapter 3. ConceptsConceptsWorkbenchThe term Workbench refers to the desktop development environment within ACE. The Workbench aims toach

Views Chapter 3. ConceptsCritical Path Diagram ViewThe Critical Path Diagram view will provide a graphical representation of a single critical path. S

Views Chapter 3. ConceptsCritical Path Diagram View Toolbar ButtonsIcon ActionDescriptionSelection toolControls the behavior of the mouse while in the

Views Chapter 3. ConceptsData FlowArrows connecting nodes for a reconvergent path diagram will point inthe direction of the asynchronous data flow, whi

Views Chapter 3. ConceptsDelaysDisplays the delay (in ps) to traverse each node or arrow.FanoutsDisplays the fanout of the net represented by the arro

Views Chapter 3. ConceptsPackage ViewThe Package view provides a graphical view of the package layout of the device. This view allows the userto visua

Views Chapter 3. ConceptsSelection toolControls the behavior of the mouse while in the Package view. Theselection tool creates a selection rectangle w

Views Chapter 3. ConceptsSelect EnabledThis radio button controls the action applied to objects inthe selection region. This setting causes the object

Views Chapter 3. ConceptsDesign Port Names EnabledDisplays the RTL port names of placed instances under thecurrent mouse position in the tooltip text.

Views Chapter 3. ConceptsIO Assignment ViewThe IO Assignment view provides a tabular representation of the properties of the I/O instances used in the

Views Chapter 3. Conceptsnot match the current filter value. All displayed rows will, in the selected column, contain text thatmatches the applied filte

Perspectives Chapter 3. ConceptsBy default, this perspective contains the ”Projects View”, ”IP Libraries View”, ”IP Diagram View”, ”IPProblems View”,

Views Chapter 3. ConceptsSave ChangedPropertiesOpens the ”Save Changed Properties Dialog”. Allows the user tosave an .sdc file containing all propertie

Views Chapter 3. ConceptsVoltage LevelThe VDD voltage level for this IO, set via the IO Standardselection.VREF LevelThe VREF voltage level for this IO

Views Chapter 3. ConceptsClock Regions ViewThe Clock Regions view provides a tabular representation of the site type content of each clock region inth

Views Chapter 3. ConceptsLUTsThe number of LUT sites contained in this clock regionALUsThe number of ALU sites contained in this clock regionBMACCsThe

Views Chapter 3. ConceptsNetlist Browser ViewThe Netlist Browser view’s purpose is to provide a graphical, tree-based visualization of the user’sdesig

Views Chapter 3. ConceptsA number of actions are available in the view, via buttons at the top of the view, and (right-click) contextmenus on the node

Views Chapter 3. ConceptsGroup By Clock DomainWhen enabled, all instances in the netlist will be grouped in the tree undertheir relevant clock domain(

Views Chapter 3. ConceptsPlacement Regions ViewThe Placement Regions view provides a tabular representation of the content of all user-created Placeme

Views Chapter 3. ConceptsHighlight InstancesHighlights all instances constrained to the currently selectedplacement region with the currently-selected

Views Chapter 3. Conceptsappear near the right-hand edge of that table cell. By selecting the ”. . . ” button, the user will be ableto use the Color D

Editors Chapter 3. ConceptsEditorsMost perspectives in the Workbench are comprised of an editor area and one or more views. Differenteditors are assoc

Views Chapter 3. ConceptsOutline ViewThe Outline view provides an alternate method for navigating the IP Configuration Editors. Selecting anitem in the

Views Chapter 3. ConceptsIP Libraries ViewThe IP Libraries view provides an alternate method for creating IP configuration files (.acxip) versusthe main

Views Chapter 3. ConceptsIP Diagram ViewThe IP Diagram view is meant to provide a graphical visualization of the configuration of the IP currentlybeing

Views Chapter 3. ConceptsFigure 3.88: Example IP Diagram for PLL Editor with some errors in redThe user may left-click on any text label in the IP Dia

Views Chapter 3. ConceptsIP Problems ViewThe IP Problems view displays a table of any warnings and errors found in the IP configurations for thecurrent

Views Chapter 3. ConceptsIP Problems View Table ColumnsColumnNameDescriptionSummaryA brief summary statement of the IP Configuration problem.FileThe IP

Views Chapter 3. ConceptsDownload ViewThe Download view provides a graphical interface for playing a STAPL11file to an Achronix FPGAconnected via a Bit

Views Chapter 3. ConceptsDownload View OptionsOption DescriptionSTAPL design fileDefault File from Current Design/Impl The STAPL design file will corres

Dialogs Chapter 3. ConceptsDialogsCreate Project DialogThe Create Project dialog helps users create a new project in the Workbench. After indicating a

Dialogs Chapter 3. ConceptsLoad Project DialogThe Load Project dialog is used to browse to find an existing project file to load into the Workbench. Aft

Editors Chapter 3. ConceptsHTML Report BrowserWhen HTML versions of generated Reports are opened within ACE, they are displayed within the Editorarea

Dialogs Chapter 3. ConceptsCreate Implementation DialogThe Create Implementation dialog is used to create a new implementation in the selected project

Dialogs Chapter 3. ConceptsRestore Implementation DialogThe Restore Implementation dialog is used to retore the database state of the active implement

Dialogs Chapter 3. ConceptsSave Implementation DialogThe Save Implementation dialog is used to save the database state of the active implementation to

Dialogs Chapter 3. ConceptsCreate a New Constraints File DialogThe Create a New Constraints File Dialog is used to easily create a new, empty constrai

Dialogs Chapter 3. ConceptsCreate a New Text File DialogThe Create a New Text File Dialog simply allows the user to create a new text file and open it

Dialogs Chapter 3. ConceptsAdd Source Files DialogThe Add Source Files dialog is used to browse for netlist (.v and .vma), constraints (.sdc and .pdc)

Dialogs Chapter 3. ConceptsFigure 3.99: Add Source Files Categorization DialogThe categorization dialog will contain the list of unknown files on the l

Dialogs Chapter 3. ConceptsSave Placement DialogThe Save Placement dialog saves the current placement to pre-placement constraints file(s). After selec

Dialogs Chapter 3. ConceptsUse DefaultLocationEnabledSelects whether the default I/O placement file path isused, or the one manually specified below the

Dialogs Chapter 3. ConceptsSave Script File DialogThe Save Script File dialog is used to create a Tcl script of find commands for the current list of

Copyright InfoCopyright © 2006 - 2012 Achronix Semiconductor Corporation; certain portions of this guide are Copyright© 2000, 2006 IBM Corporation and

Editors Chapter 3. ConceptsAdvanced PLL Configuration EditorThe Advanced PLL Configuration Editor provides a graphical wizard for creating a PLL configur

Dialogs Chapter 3. ConceptsNew IP Configuration DialogThe New IP Configuration dialog helps users create a new IP configuration file (.acxip). After indic

Dialogs Chapter 3. ConceptsGenerate IP Design Files DialogThe Generate IP Design Files dialog is used to create the necessary RTL models, timing const

Dialogs Chapter 3. ConceptsPlacement Constraints SelectedSelects whether a placement constraints file for theconfiguration is generated.(1)Additional Ge

Dialogs Chapter 3. ConceptsConfigure Selected IOs DialogThe ”Configure Selected IOs Dialog” allows the user to configure the electrical settings for the

Dialogs Chapter 3. ConceptsChange On DieTermination toEnabling this option allows the user to change the On Die Terminationsetting of the selected IOs

Dialogs Chapter 3. ConceptsSave Changed Properties DialogThe ”Save Changed Properties Dialog” allows the user to save to an .sdc file any properties th

Dialogs Chapter 3. ConceptsGenerate a Pin Assignment Report DialogThe ”Generate a Pin Assignment Report” dialog allows the user to generate a customiz

Dialogs Chapter 3. ConceptsConfigure Table Columns DialogThe ”Configure Table Columns Dialog” allows the user to configure the columns shown in the activ

Dialogs Chapter 3. ConceptsAdd Signals to Waveform Viewer DialogThis dialog allows the user to add signals to the table and waveform area of the VCD W

Dialogs Chapter 3. Concepts1)This button may be pressed multiple times for a given signal, which will add the signal selected in thedialog’s list to t

Editors Chapter 3. ConceptsOverview PageThe Overview page contains the top-level, global properties that govern the structure and baseconfiguration of

Dialogs Chapter 3. ConceptsAssign Bussed Signal Names DialogThe Assign Bussed Signal Names Dialog wizard allows the user to combine multiple signals f

Dialogs Chapter 3. ConceptsSearch Filter Builder DialogThis wizard dialog allows the user to build simple or compound search filters to be used in the

Dialogs Chapter 3. ConceptsEQUALSelect this radio button when you want to join two filters into a compound filterwhere the Boolean value of both sub-filt

Dialogs Chapter 3. ConceptsCreate Placement Region DialogThis wizard dialog appears after the user has used drag-and-drop to define a rectangular area

Dialogs Chapter 3. ConceptsSnap to TileBoundariesIf selected, ACE will create a Placement Region that encompasses all Tilesselected within the drag-an

Dialogs Chapter 3. ConceptsSave Placement Regions DialogThis wizard dialog appears after the user has selected the ”Save Placement Regions” action in

Toolbars Chapter 3. ConceptsToolbarsThere are three kinds of toolbars in the Workbench: main, view, and fast view.The main toolbar, sometimes called t

Preferences Chapter 3. ConceptsPreferencesThe ”Preferences dialog” is used to set user preferences. The Preferences dialog pages can be searched using

Preferences Chapter 3. ConceptsCritical Path Diagram View Preference PageThis page configures the display preferences of the Critical Path Diagram view

Preferences Chapter 3. ConceptsCancelWhen this button is pressed, any preference configuration changes made sincethe dialog was opened (or since the la

Editors Chapter 3. ConceptsPLL Editor Overview Page OptionsOption EditableDescriptionTarget Device YThe Speedster22i device this PLL is intended to ta

Preferences Chapter 3. ConceptsFloorplanner View Colors Preference PageThe Floorplanner View Colors Preference Page configures multiple layer color pre

Preferences Chapter 3. ConceptsFloorplanner View Optimizations Preference PageThe Floorplanner View Optimizations Preference Page configures rendering

Preferences Chapter 3. ConceptsOptimization settings which may vary with design complexityOptionTechnical DescriptionUsability NotesWhen panning, show

Preferences Chapter 3. ConceptsMax unsegmented area:Areas larger than this will be brokeninto smaller chunks up to Maxre-quartering recursion times.Re

Preferences Chapter 3. ConceptsTechnical Note forWindows UsersThe Windows operating system requires that applications check-in every fiveseconds, or th

Preferences Chapter 3. ConceptsIP Diagram Preference PageThere are a number of preferences for the ”IP Diagram View” relating to colors and fonts.Figu

Preferences Chapter 3. ConceptsError BackgroundColorText representing IP Options with errors will have their backgrounds paintedthis color.UG001 Rev.

Preferences Chapter 3. ConceptsMultiprocess View Preference PageThis page allows the user to manage custom command-line options for the qsub command u

Preferences Chapter 3. ConceptsCaution: Debugging qsub configurations: If theGridEngine and qsub are properly configured19on the host machine, and ACE i

Preferences Chapter 3. ConceptsOther Colors and Fonts Preference PageMany of the fonts and colors and used by ACE components can be set using the Gene

Editors Chapter 3. ConceptsAchieved NFThis calculated value shows the exact ”Feedback Divider’NF’” value which will be used by the PLL. This maydiffer

Preferences Chapter 3. ConceptsPackage View Preference PageView settings for the Package view are set via the Package View preference page. This page

Preferences Chapter 3. ConceptsPlacement Regions Preference PageThe Placement Regions Preference Page configures how Placement Regions are handled in t

Preferences Chapter 3. ConceptsProject Management Preference PageThe behavior of editors and reports is set from the Project Management Preference Pag

Preferences Chapter 3. ConceptsTcl Console View Preference PageThe Tcl Console View Preference Page contains settings that alter the behavior and/or p

Preferences Chapter 3. ConceptsText Editors Preference PageThe behavior and appearance of the text editor can be set from the Text Editors Preference

Preferences Chapter 3. ConceptsUndo history size 200Sets the undo history size.Display tab width 4Sets the tab width for the editor.Insert spaces for

Preferences Chapter 3. ConceptsQuick Diff Preference PageThe Quick Diff preferences can be changed on the Quick Diff preference page, accessed via Tex

Projects Chapter 3. ConceptsProjectsA project represents the collection of source netlist and constraints files, flow options, IP configuration files,and

Projects Chapter 3. ConceptsOption Sets only enable performance-related implementation options, and (currently) never disable anyalready-enabled imple

Projects Chapter 3. ConceptsProject FileProjects are persisted in project files (.acxprj file extension) created automatically by the tool whenever apro

Editors Chapter 3. ConceptsPlacement PageThe Placement page contains configuration information relating to the PLLs placement in the Speedsterdevice. T

Projects Chapter 3. Conceptsassociated with a project. When associated with a project, these IP Configuration files may then be browsedin the Projects v

Projects Chapter 3. ConceptsMultiprocess LogUnlike normal flow executions, implementation runs initiated from the Multiprocess View do not have theirlo

Flow Chapter 3. ConceptsFlowThe flow is the set of steps that must be run to complete a design in ACE.A flow can only be run on an active project implem

Reports Chapter 3. ConceptsReportsACE generates a number of reports to inform users how their designs are being handled in the selectedAchronix device

Reports Chapter 3. ConceptsTiming ReportThe Timing Report provides details on how well the current design is meeting timing on the selected device.Tim

Reports Chapter 3. Conceptseach clock is analyzed in isolation, ignoring the relations between them. (For clocks which have no relatedclocks, the resu

Reports Chapter 3. ConceptsTiming Results Summary SectionThe Timing Results Summary section of the report will only be generated if either the ”Run Po

Advanced Concepts Chapter 3. ConceptsAdvanced ConceptsThe following are advanced concepts intended primarily for extremely experienced users, or users

Chapter 4. TasksTasksRunning ACEACE can be run in three different modes:• GUI• Command line• BatchTo run in GUI mode, invoke the ace executable either

Working With Perspectives Chapter 4. TasksWorking With PerspectivesPerspectives define the initial set and layout of views in the Workbench window, pro

Editors Chapter 3. ConceptsClock Output [0,1,2,3] PagesThe Clock Output pages each contain general configuration information relating to a single PLL o

Working with Views and Editors Chapter 4. TasksWorking with Views and EditorsViews and editors are the main visual entities appearing in the Workbench

Working with Views and Editors Chapter 4. TasksCreating Fast ViewsFast views are hidden views that can be quickly opened and closed. These views work

Working with Projects and Implementations Chapter 4. TasksWorking with Projects and ImplementationsCreating ProjectsTo create a new project in the wor

Working with Projects and Implementations Chapter 4. TasksFigure 4.1: Unsaved Project View2. Either press CTRL+S on the keyboard, select the File → Sa

Working with Projects and Implementations Chapter 4. TasksFigure 4.2: Unsaved Changes PromptOpening Project Files in an EditorTo open a project file in

Working with Projects and Implementations Chapter 4. Tasks4. Select one or more files, and click Open.After clicking Open, the source files appear in th

Working with Projects and Implementations Chapter 4. TasksSaving ImplementationsTo save the state of the database (options, netlist, constraints, plac

Working with Projects and Implementations Chapter 4. TasksCopying ImplementationsTo create a new implementation that is a copy of an existing implemen

Working with Projects and Implementations Chapter 4. TasksOpening Report Files in an EditorTo open a report file in the editor area, double-click on th

Running the Flow Chapter 4. TasksRunning the FlowA flow can only be run on the current active implementation. If no active implementation is set in the

Editors Chapter 3. ConceptsOutput Divider [0,1,2,3] PagesThe Output Divider pages contain configuration information relating to the output divider (OD)

Running the Flow Chapter 4. TasksRun Estimated Timing Analysis (Optional)After Run Prepare has successfully completed on an implementation, the Run Es

Running the Flow Chapter 4. Tasksfinal simulation netlist can be generated without errors. If your design fails final DRC checks, you can stillgenerate

Running the Flow Chapter 4. TasksConfiguring the Execution QueuesWithin the Multiprocess view, the ”Execution Queue Management” section allows the user

Running the Flow Chapter 4. TasksA = R - ( O + G + B + U ), whereR = total RAM installed in the workstationO = amount of memory required by the Operat

Running the Flow Chapter 4. Tasksand ACE is still unable to successfully submit jobs to the GridEngine, please contact Achronix technicalsupport.WARNI

Running the Flow Chapter 4. TasksTip:If the implementation table isn’t large enough (or is too large) for the full implementationlist, simply collapse

Running the Flow Chapter 4. Tasksof the captured error messages. Error details will be visible in the log messages shown in the tab, as well aswithin

Using the Tcl Console Chapter 4. TasksUsing the Tcl ConsoleAny operation that changes project or design data can be performed from the command line vi

Using the Tcl Console Chapter 4. TasksENTER on a selected command to complete it at the command prompt. Typing while the command auto-completion dialo

Using the Tcl Console Chapter 4. TasksFigure 4.5: Help Text DisplayFigure 4.6: Help Text Displayed in TCL ConsoleText LimitThe TCL Console view has a

Editors Chapter 3. ConceptsOD [0,1,2,3] Phase Adjustment PagesThe Output Divider (OD) Phase Adjustment pages contain configuration information about th

Using the Tcl Console Chapter 4. TasksViewing the ACE Log FileAll TCL commands and messages issued during an ACE session are recorded in the ACE log fi

Creating an IP Configuration Chapter 4. TasksCreating an IP ConfigurationAchronix FPGAs feature embedded IP to support clock signal generation (PLLs), F

Creating an IP Configuration Chapter 4. TasksSetting the IP ConfigurationFrom the IP Editor, use either theBack and Nextor the Outline view to navigat

Viewing the Floorplanner Chapter 4. TasksViewing the FloorplannerOpening and Closing the Fly-Out PaletteTo open and close the Floorplanner view’s fly-o

Viewing the Floorplanner Chapter 4. TasksPanningTo pan with the scroll bars:• Click and drag the vertical scroll bar to pan up and down or click and d

Viewing the Floorplanner Chapter 4. Tasks1. Select the Selection Tool ( ) from the view toolbar. From the Selection section fly-out palette, checkthe o

Viewing the Floorplanner Chapter 4. TasksViewing Object LabelsA variety of object labels are available when displaying objects in the Floorplanner vie

Viewing the Package Layout Chapter 4. TasksViewing the Package LayoutOpening and Closing the Fly-Out PaletteTo open and close the Package view’s fly-ou

Viewing the Package Layout Chapter 4. TasksPanningTo pan with the scroll bars:1. Click and drag the vertical scroll bar to pan up and down or click an

Viewing the Package Layout Chapter 4. Tasks1. Select the Selection Tool ( ) from the view toolbar. From the Selection section of the fly-out palette,ch

Editors Chapter 3. ConceptsPLL Editor OD Phase Adjustment OptionsOption EditableDescriptionOD[0-3] Phase ShiftIncrement UnitThe incremental step, alwa

Viewing the Package Layout Chapter 4. TasksGetting Object TooltipsFor instant feedback on instance or site names in the Package view, a tooltip (hover

Pre-Placing a Design Chapter 4. TasksPre-Placing a DesignPlacing an ObjectCurrently in ACE, there are two types of objects that can be placed: instanc

Pre-Placing a Design Chapter 4. TasksChanging Between Fixed and Soft PlacementThere are two types of placement in ACE: soft and fixed. Fixed placement

Pre-Placing a Design Chapter 4. TasksRemoving PlacementTo un-place objects with key-strokes:1. In the Floorplanner view or Package view, press and hol

Analyzing Critical Paths Chapter 4. TasksAnalyzing Critical PathsCritical paths are computed by timing analysis. Timing analysis can be run at several

Analyzing Critical Paths Chapter 4. Tasks• Asynchronous devices: By default, highlight colors are arranged in a gradient from red to yellowaccording t

Analyzing Critical Paths Chapter 4. TasksThe nets are now added to the selection in the Selection view and are shown with the selection color in theFl

Analyzing Critical Paths Chapter 4. Taskshidden due to insufficient drawing area.Arrows The arrows connecting the graph nodes in the diagram represent

Analyzing Critical Paths Chapter 4. TasksFigure 4.9: Critical Path Diagram View for LoopReconvergent critical paths (which only occur in asynchronous

Analyzing Critical Paths Chapter 4. TasksFigure 4.10: Reconvergent Path diagram configured with Driver->Sink topology, User Logic arrows, and noInte

Editors Chapter 3. ConceptsOutput Synthesizer [0,1,2,3] PagesThe Output Synthesizer (OS) pages contain configuration information relating to the OS ass

Analyzing Critical Paths Chapter 4. TasksFigure 4.12: Reconvergent Path diagram configured with Polygon topology, User Logic arrows, and noIntermediate

Analyzing Critical Paths Chapter 4. TasksFigure 4.13: Reconvergent Path diagram configured with Polygon topology, Data Flow arrows, and noIntermediate

Analyzing Critical Paths Chapter 4. TasksWhen comparing the four screenshots above, it is also possible to see the differences between the ”RC PathArr

Analyzing Critical Paths Chapter 4. TasksFigure 4.15: Critical Path Diagram with net ”s[30]” selected. Note that the single net is represented by twoa

Managing I/Os Chapter 4. TasksManaging I/OsI/O electrical properties are often iteratively tweaked at the final stages of design. Frequently the user d

Running the SnapShot Debugger Chapter 4. TasksRunning the SnapShot DebuggerSnapShot is the real-time design debugging tool for Achronix FPGAs. SnapSho

Running the SnapShot Debugger Chapter 4. TasksThe following sections will further explain SnapShot and guide the user through the process.General Snap

Running the SnapShot Debugger Chapter 4. TasksFigure 4.18: SnapShot Trigger Detector Block Diagram• Trace Buffers Trace Buffers are implemented using

Running the SnapShot Debugger Chapter 4. TasksRstn out Output usr clkWhen low, indicates SnapShot logic is being reset. May be usedto reset portions o

Running the SnapShot Debugger Chapter 4. TasksThe user may optionally modify their Design Under Test (DUT) to respond to external data sent via theSna

CONTENTS CONTENTSContents1 Preface 11.1 About This Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2

Editors Chapter 3. ConceptsPort Names PageThe Port Names page contains all the input and output ports which will be used by the PLL in its currentconfi

Running the SnapShot Debugger Chapter 4. Tasks32 wire arm ; / / / / / S i gn a l i n d i c a t e s SnapShot i s armed ( and has st a r t e d t e s t i

Running the SnapShot Debugger Chapter 4. Tasks51 St i m u l i : out s t d l o g i c v e c t o r ( 3 5 downto 0 ) ;52 R s t n out : out s t d l o g i c

Running the SnapShot Debugger Chapter 4. TasksThe Automatically Detect Pod option is a convenience for when there is only one pod connected. If moreth

Running the SnapShot Debugger Chapter 4. TasksEach sequential trigger is configured in 2 parts: the ”Pattern” and the ”Dont Care” mask. The trigger”Pat

Running the SnapShot Debugger Chapter 4. TasksSetting Triggering RangeIn the SnapShot Debugger view, the ”Pre-Store” setting configures the how many sa

Running the SnapShot Debugger Chapter 4. TasksActivating SnapShotOnce all the fields in the SnapShot Debugger view are configured, and the design is run

Playing a STAPL File Chapter 4. TasksPlaying a STAPL FileA STAPL14file can be run or played from the Download view. From this view, individual STAPL Ac

Optimizing a Design Chapter 4. TasksOptimizing a DesignThere are numerous methods of design optimization available to ACE users.Many optimizations are

Optimizing a Design Chapter 4. TasksGenerating Option Set Implementations and Starting Background ExecutionAfter the Start Selected button has been pr

Placement Regions and Placement Region Constraints Chapter 4. TasksPlacement Regions and Placement Region ConstraintsPlacement Regions and Placement R

Editors Chapter 3. ConceptsAdvanced PLL Editor Port Names Page OptionsOption DescriptionInput PortsName for Input ”refclk” The desired name for the re

Placement Regions and Placement Region Constraints Chapter 4. Tasks7. Fill in the desired Placement Region name8. Select whether the Placement Region

Placement Regions and Placement Region Constraints Chapter 4. Tasks4. (Optional) If the Placement Region is meant to align with (snap to) one or more

Placement Regions and Placement Region Constraints Chapter 4. Tasksthe Instances/Paths not in the current set of 200 on the visible page of results) m

Placement Regions and Placement Region Constraints Chapter 4. TasksImportant considerationwhen saving placementregion constraints:Only the final list o

add project netlist Chapter 5. Tcl Command ReferenceTcl Command Referenceadd project constraintsadd project constraints <file> [-project <arg

all clocks Chapter 5. Tcl Command Referenceadd region instsadd region insts <region> <insts> [-flops only] [-include constants][-include a

clear drawing Chapter 5. Tcl Command Referencefollowing commands can be entered on the command line *before* the final flow step:set_extra_pipeline -xp

clear ovals Chapter 5. Tcl Command Reference[-id <arg>]Optional The optional -id <id> optionspecifies a unique id for a singleline to clear

clock info Chapter 5. Tcl Command Referenceclear polygonsclear polygons [-id <arg>]This command allows you to clear a custom polygon or all the

clock relation Chapter 5. Tcl Command Reference[-net <arg>] Optional use the domain of this net[-unique] Optional use a unique domain fordomains

Editors Chapter 3. ConceptsBasic PLL Configuration EditorThe Basic PLL Configuration Editor provides a simplified graphical wizard for creating a PLL con

create flow step Chapter 5. Tcl Command Referencesame units as T). By default the numbers are as small as possible, but with -group all related clocks

create generated clock Chapter 5. Tcl Command Reference[-parent id <arg>] Optional The optional -parent id<parentId> option specifies theflo

create path Chapter 5. Tcl Command ReferenceThis command is useful for the user to generate the clock constraint if the design has PLL or any circuit-

create region Chapter 5. Tcl Command Referencecreate projectcreate project <projectFile> [-impl <arg>] [-not active]This command creates a

disable project constraints Chapter 5. Tcl Command Reference[-batch] Optional Postpone application of thisconstraint until apply placementis called (t

draw arc Chapter 5. Tcl Command Reference[-impl <arg>] Optional The optional -project<projectName> and -impl<implName> options are u

draw arc Chapter 5. Tcl Command Reference<width> Required The required <width>argument specifies the width ofthe arc.<height> Require

draw line Chapter 5. Tcl Command Referencedraw linedraw line <x1> <y1> <x2> <y2> [-layer <arg>] [-id <arg>] [-rgb

draw oval Chapter 5. Tcl Command Referencedraw ovaldraw oval <x> <y> <width> <height> [-layer <arg>] [-id <arg>] [

draw polygon Chapter 5. Tcl Command Reference[-fill] Optional The optional -fill option specifieswhether the oval should be filledwith color or not. If t

Editors Chapter 3. ConceptsOverview PageThe Overview page contains all the properties that govern the structure and configuration of the basic PLL.Figu

draw rectangle Chapter 5. Tcl Command Reference[-fill] Optional The optional -fill option specifieswhether the arc should be filledwith color or not. If

draw string Chapter 5. Tcl Command Reference[-thickness <arg>] Optional The optional -thickness<pixels> option specifies therectangle thick

find Chapter 5. Tcl Command Reference[-batch] Optional The optional -batch optioncauses the GUI to not refreshafter this command. This isuseful when ru

find Chapter 5. Tcl Command ReferenceArgument Required/Optional Description<patterns> Required The required <patterns>argument specifies a l

find Chapter 5. Tcl Command Reference[-paths] Optional The optional -paths object typeoption is used to specify that theresults may include path object

get active impl Chapter 5. Tcl Command Referencegenerate ip design filesgenerate ip design files <acxipFile>This command generates the enabled de

get clocks Chapter 5. Tcl Command Referencecurrent ACE session.ArgumentRequired/Optional Description[-quiet]Optional do not print a message if there i

get enabled constraints Chapter 5. Tcl Command ReferenceElaborationThis command is especially useful for the user to see how many clocks exist inside

get impl names Chapter 5. Tcl Command Reference[-project <arg>] Optional The optional -project<projectName> and -impl<implName> opti

get nets Chapter 5. Tcl Command Referenceget impl optionget impl option <option name> [-project <arg>] [-impl <arg>]This command ret

Editors Chapter 3. Conceptsclkout0 DesiredFrequencyYThe frequency desired for clkout0. ACE will automaticallychoose PLL configuration values (NR, NF, O

get part names Chapter 5. Tcl Command ReferencefilterRequired The required <filter> option isused to filter returned node names(string patterns ar

get placement Chapter 5. Tcl Command Reference[-slack]Optional The optional -text optionreturns the details text for thispath.[-tokens]Optional The op

get project directory Chapter 5. Tcl Command Referenceget pod namesget pod names [-all] [-usb] [-ethernet] [-list <args>]Returns a list of names

get properties Chapter 5. Tcl Command ReferenceThis command returns the path to a project file’s parent directoryArgument Required/Optional Description

get selection Chapter 5. Tcl Command Referenceget propertyget property <object> <propName>This command returns the specified property value

get stapl actions Chapter 5. Tcl Command Reference[-ports]Optional The optional -ports object type option isused to specify that the results mayinclud

get techlibt name Chapter 5. Tcl Command Referenceget techlib nameget techlib name <partName>This command returns the name the of black box veri

get techlibx path Chapter 5. Tcl Command Reference<partName>Required The required <partName>argument is used to specify thename of the par

load place and route Chapter 5. Tcl Command Referencehighlighthighlight <objects> [-rgb <args>] [-batch]This command is used to highlight

message Chapter 5. Tcl Command Reference[-acxfile <arg>] Optional The required -acxfile <file>option is specifies the place androute data file

Editors Chapter 3. ConceptsBRAM Configuration EditorThe BRAM Configuration Editor provides a simplified graphical wizard for creating a BRAM configuration

remove impl Chapter 5. Tcl Command Reference[-info]Optional Make this message an informational message.[-warning]Optional Make this message a warning

remove project ip Chapter 5. Tcl Command Referenceremove pathremove path <id>This command removes a user-defined pin path.ArgumentRequired/Option

remove region insts Chapter 5. Tcl Command Reference[-project <arg>] Optional The optional -project<projectName> option is usedto specify

report clock Chapter 5. Tcl Command Referencerename implrename impl <newImplName> [-project <arg>] [-impl <arg>]This command renames

report pins Chapter 5. Tcl Command Reference[-outputfile <arg>] Optional The optional -outputfile <file>option may be used to specify anoutp

report power Chapter 5. Tcl Command Reference[-outputfile <arg>] Optional The optional -outputfile <file>option may be used to specify anout

report regions Chapter 5. Tcl Command Reference[-clocks <arg>] Optional The -clocks < clk1 freq clk2 freq.. clkn freq > option may beused

report utilization Chapter 5. Tcl Command Reference[-csv] Optional The optional -csv option is usedto specify whether the fileshould be output as a CSV

reset sta Chapter 5. Tcl Command Reference[-text] Optional The optional -text option is usedto specify whether the fileshould be output as plain text.[

restore project Chapter 5. Tcl Command Referencerestoring an impl.Argument Required/Optional Description<filename> Required Specifies the ACXDB fi

Editors Chapter 3. ConceptsOverview PageThe Overview page contains all the properties that govern the structure and configuration of the BRAMwrapper.BR

run fanout control Chapter 5. Tcl Command Reference[-activeimpl <arg>] Optional The -activeimpl option can beused to specify an alternate implna

run gate balance Chapter 5. Tcl Command Reference[-fanout limit clone<arg>]Optional Apply fanout cloning on netswith fanout greater than thislim

run generate bitstream Chapter 5. Tcl Command Referencerun generate bitstreamrun generate bitstream [-outputdir <arg>] [-reportsdir <arg>]

run insert reset Chapter 5. Tcl Command Referencerun generate netlistrun generate netlist [-outputfile <arg>] [-debugdir <arg>] [-final][-

run prepare Chapter 5. Tcl Command Reference[-structural clustering<arg>]Optional Turn on structural clusteringduring placement (1,0)[-verbose &

run remove reset Chapter 5. Tcl Command Reference[-constraints <arg>] Optional The optional -constraints <file1file2 . . . > option override

run timing analysis Chapter 5. Tcl Command Reference[-nocore] Optional Non-core routing only[-timing <arg>] Optional Use timing-driven routing (

run un post process Chapter 5. Tcl Command Reference[-prepared] Optional Indicates that the design hasonly been prepared (this is thedefault)[-placed]

save placement Chapter 5. Tcl Command Reference[-constants] Optional Just unplace constant sources[-insts <args>] Optional unplace only the inst

save placement Chapter 5. Tcl Command ReferenceArgument Required/Optional Description[-iofile <arg>] Optional The optional -iofile <file>opt

Editors Chapter 3. ConceptsClock Enable Priority YThe Clock Enable Priority defines the priorityof the outregcea clock enable input relative tothe rstr

save project Chapter 5. Tcl Command Reference[-ball names] Optional The optional -ball names optionis used to specify whether ballnames should be outp

select Chapter 5. Tcl Command Reference[-no log] Optional If the -no log option is set, noadditional debug informationwill be saved in the ACXDB file,i

set clock groups Chapter 5. Tcl Command ReferenceArgumentRequired/Optional Description<objects>Required The required <objects> argumentspe

set cluster Chapter 5. Tcl Command ReferenceElaborationThis command takes a list of clocks and makes them unrelated to each other. Below is the comman

set extra delay Chapter 5. Tcl Command Reference[-wt <arg>]Optional Optional 2nd level cluster weight2, . . . , 5 - higher weights signifycluste

set extra pipeline Chapter 5. Tcl Command ReferenceTo add additional delays on any pin in <pinlist>, a leading delay value can be added in the &

set impl option Chapter 5. Tcl Command ReferenceArgumentRequired/Optional DescriptionclockRequired Specify clock domain[-xp <arg>]Optional Extra

set impl option Chapter 5. Tcl Command ReferenceArgument Required/Optional Description<option name> Required The name of the impl option toset a

set input transition Chapter 5. Tcl Command Referenceset input delayset input delay delay port pin list [-clock <arg>] [-combinational]Specify a

set output delay Chapter 5. Tcl Command ReferenceArgument Required/Optional Descriptionslew Required slew valueport pin list Required port pin list (o

Editors Chapter 3. ConceptsOutput RegisterClock Enable Priority YThe Clock Enable Priority defines the priorityof the outregceb clock enable input rela

set placement Chapter 5. Tcl Command Referenceor in easier way user can use for loop in SDC filefor {set i 0} {$i < <bus_width>} {incr i} {set

set region bounds Chapter 5. Tcl Command Reference[-batch]Optional Postpone application of thisconstraint until apply placementis called (this avoids

write bitstream Chapter 5. Tcl Command Referenceset unitsset unitsSet the default units for timing constraints.timing summarytiming summary [-actual]

write netlist Chapter 5. Tcl Command Reference[-flash4x] Optional The optional -flash4x optionmay be used to output 4additional 4x serial flash binaryfil

write tcl history Chapter 5. Tcl Command Reference[-debugdir <arg>] Optional The optional -debugdir <dir>option is used to override thedef

Chapter 6. Revision HistoryRevision HistoryThe following outline lists the revision history of this document.Version 5.0.0:• Updated to match ACE 5.0

Chapter 6. Revision History*Updated the Search view, Selection view, and Netlist Browser View to mention new drag-and-drop support for assignment of p

Chapter 6. Revision History*added: add region insts, create region, display rtl, get region insts,remove region, remove region insts, report regions,

Chapter 6. Revision History*now obsolete/deprecated: ideal reset, initialize flow, load flowscripts,run auto cst• Updated to match ACE 4.1 functionali

Revision History Speedster22i FPGA Family– Updated the Download View and Selecting A STAPL File pages to mention the new MRUlist/combo-box storing the

Editors Chapter 3. ConceptsFigure 3.13: BRAM IP Editor Overview Page27 http://www.achronix.com UG001 Rev. 5.0 - 5th December 2012

CONTENTS CONTENTS3.4.9 Critical Paths View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1443.4.10 Critical Path Diagr

Editors Chapter 3. ConceptsDDR3 Configuration EditorThe DDR3 Configuration Editor provides a graphical wizard for creating a DDR3 Interface IP configurat

Editors Chapter 3. ConceptsFigure 3.14: A Module diagram for DDR3 in the IP Diagram View29 http://www.achronix.com UG001 Rev. 5.0 - 5th December 2012

Editors Chapter 3. ConceptsFigure 3.15: A Placement diagram for DDR3 in the IP Diagram View.UG001 Rev. 5.0 - 5th December 2012 http://www.achronix.com

Editors Chapter 3. ConceptsOverview PageThe Overview page contains the top-level, global properties that govern the structure and baseconfiguration of

Editors Chapter 3. ConceptsDDR3 Editor Overview Page OptionsOptionDescriptionTarget DeviceAllows the user to select from the Achronix devices that sup

Editors Chapter 3. ConceptsMemory Timing PageThe Memory Timing Page allows the user to configure the memory timings for the DDR3 Interface.DDR3 Editor

Editors Chapter 3. ConceptsFigure 3.17: DDR3 IP Editor Memory Timing PageUG001 Rev. 5.0 - 5th December 2012 http://www.achronix.com 34

Editors Chapter 3. ConceptsDLL Timing PageThe DLL Timing Page allows the user to configure the DLL timing parameters for the DDR3 Interface.DDR3 Editor

Editors Chapter 3. ConceptsFigure 3.18: DDR3 IP Editor DLL Timing PageUG001 Rev. 5.0 - 5th December 2012 http://www.achronix.com 36

Editors Chapter 3. ConceptsOn-Die Termination PageThe On-Die Termination Page allows the user to configure the On-Die Termination parameters for the DD

CONTENTS CONTENTS3.7.5 Multiprocess View Preference Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2153.7.6 Other Colors and Fonts Pre

Editors Chapter 3. ConceptsDDR3 Editor On-Die Termination Page OptionsOptionDescriptionODT Selection for ReadsODT ReadCS0Enable/Disable On-Die Termina

Editors Chapter 3. ConceptsEthernet Configuration EditorThe Ethernet interface configuration editor provides a simple graphical editor used to configure

Editors Chapter 3. ConceptsFigure 3.21: Ethernet IP Editor Module DiagramUG001 Rev. 5.0 - 5th December 2012 http://www.achronix.com 40

Editors Chapter 3. ConceptsOverview PageThe Overview page of the Ethernet IP Configuration Editor contains all the options that govern the structureand

Editors Chapter 3. ConceptsEthernet Editor Overview Page OptionsOption DescriptionTarget Device Select the intended 22i Target Device. This may affect

Editors Chapter 3. ConceptsFIFO Configuration EditorThe FIFO Configuration Editor provides a graphical wizard for creating a FIFO configuration file (.acx

Editors Chapter 3. ConceptsOverview PageThe Overview page contains the top-level, global properties that govern the structure and baseconfiguration of

Editors Chapter 3. ConceptsClock Enable Priority YThe Clock Enable Priority controls the relationshipbetween the outregce clock enable input and thers

Editors Chapter 3. ConceptsRead Pointer Sync StageDepthYThe rdptr sync stages parameter defines thenumber of stages used in the Read PointerSynchonizer

Editors Chapter 3. ConceptsFigure 3.24: FIFO IP Editor Overview Page47 http://www.achronix.com UG001 Rev. 5.0 - 5th December 2012

CONTENTS CONTENTS4.3.5 Tiling Editors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2394.3.6 Maximizing a View o

Editors Chapter 3. ConceptsReset Configuration PageThe Reset Configuration page contains the properties that govern the reset behavior of the FIFO.Figur

Editors Chapter 3. ConceptsWritePointerResetSourceYThe Write Pointer Reset Source selects the reset source for the writepointer by configuring the wrrs

Editors Chapter 3. ConceptsInterlaken Configuration EditorThe Interlaken interface configuration editor provides a simple graphical editor used to config

Editors Chapter 3. ConceptsFigure 3.27: Interlaken IP Module Diagram for a six-lane instance51 http://www.achronix.com UG001 Rev. 5.0 - 5th December 2

Editors Chapter 3. ConceptsOverview PageThe Overview page contains the top-level, global options that govern the structure and base configurationof the

Editors Chapter 3. ConceptsNumber of ChannelsYThe number of channels to be used.PlacementInterlaken Block YSelects which Interlaken site will be used

Editors Chapter 3. ConceptsRx PMA Equalization PageThis page allows the customization of the PMA equalization settings of the Interlaken wrapper.Figur

Editors Chapter 3. ConceptsDFE Pulse-shaping Tap 3dBFreqDFE pulse-shaping tap 3dB frequencyDFE Pulse-shaping Tab GainDFE pulse-shaping tap gainDFE N1

Editors Chapter 3. ConceptsRx PMA PLL PageThis page allows customization of the Rx PLL settings of the Interlaken wrapper.Figure 3.30: Rx PMA PLL Page

Editors Chapter 3. ConceptsTx PMA Driver PageThis page allows the customization of the Tx PMA Driver settings for the Interlaken wrapper.Figure 3.31:

CONTENTS CONTENTS4.7.2 Setting the IP Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2604.7.3 Generating the IP Desi

Editors Chapter 3. ConceptsTransition Bit Amplitude(mV)((Cursor Level)+3)/34*(Transmit Amplitude)Postcursor Bit Amplitude(mV)((Cursor Level)+3-2*(Post

Editors Chapter 3. ConceptsTx PMA PLL PageThis page allows the customization of the Tx PMA PLL settings for the Interlaken wrapper.Figure 3.32: Tx PMA

Editors Chapter 3. ConceptsInterrupt Settings PageThis page allows the customization of the Interrupts for the Interlaken wrapper.Figure 3.33: Interru

Editors Chapter 3. ConceptsInterrupt Settings Page OptionsOption DescriptionEnable Master Interrupt Override Allows the use of the Master InterruptOve

Editors Chapter 3. ConceptsInterlaken Tx Settings PageThis page contains the Interlaken Transmit-side settings for the Interlaken wrapper.Figure 3.34:

Editors Chapter 3. ConceptsTX Has BadLaneTX Bad LaneTX Last LaneTX Rate LimiterEnable TX RateLimiterMax Tokens(hex)Specifies how many tokens are to be

Editors Chapter 3. ConceptsInterlaken Rx Settings PageThis page configures the Interlaken Receive-side settings for the Interlaken wrapper.Figure 3.35:

Editors Chapter 3. ConceptsRX Packet Mode Changes the way the error handler reports errors. Eitherpackets are expected to arrive interwoven as segment

Editors Chapter 3. ConceptsLRAM Configuration EditorThe LRAM Configuration Editor provides a simplified graphical wizard for creating an LRAM wrapper IPc

Editors Chapter 3. ConceptsOverview PageThe Overview page contains all the properties that govern the structure and configuration of the LRAMwrapper.Fi

CONTENTS CONTENTS4.13.2 Using the SnapShot Macro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2854.13.3 Setting Up the Bitporte

Editors Chapter 3. ConceptsWrite Clock PolarityYThe write port clock polarity can be set to useeither rising edge assignment or falling edgeassignment

Editors Chapter 3. ConceptsLRAM FIFO Configuration EditorThe LRAM FIFO Configuration Editor provides a graphical wizard for creating an LRAM FIFOconfigur

Editors Chapter 3. ConceptsOverview PageThe Overview page contains the top-level, global properties that govern the structure and baseconfiguration of

Editors Chapter 3. ConceptsAlmost Full Offset(decimal)This defines the word depth at which the FIFO almost full signalis asserted. The almost full flag

Editors Chapter 3. ConceptsPCI Express Configuration EditorThe PCI Express (PCIe) interface configuration editor provides a simple graphical editor used

Editors Chapter 3. ConceptsFigure 3.41: PCIe IP Module Diagram73 http://www.achronix.com UG001 Rev. 5.0 - 5th December 2012

Editors Chapter 3. ConceptsOverview PageThe Overview page contains all the options that govern the structure and configuration of the PCI Expressinterf

Editors Chapter 3. ConceptsPCIe PlacementChoose which site this PCIe instance should occupy. The Placement IP Diagramwill be updated to show the chose

Editors Chapter 3. ConceptsMemory Map PageThis page contains the options that pertain to the PCIe Memory Map.Figure 3.43: PCIe IP Editor Memory Map Pa

Editors Chapter 3. ConceptsPCIe Editor Overview Page OptionsOptionDescriptionBAR0BAR0 TypeEach BAR can be configured as Memory or I/OBAR0 WidthEach BAR

CONTENTS CONTENTS5.13 clear ovals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3055.14 clear polygo

Editors Chapter 3. ConceptsPower Management PageThis page contains all the options for PCIe power management.Figure 3.44: PCIe IP Editor Power Managem

Editors Chapter 3. ConceptsEnable L1 ASPMSupportActive State Power Management (ASPM) SupportL1 Entry Time (hex)Number of microseconds of idle time to

Editors Chapter 3. ConceptsAdvanced Features PageThis page contains all the options that govern the advanced features of the PCI Express interface.Fig

Editors Chapter 3. ConceptsPhantom FunctionsSupportPhantom Function support for the Function must be enabled by the PhantomFunctions Enable field in th

Editors Chapter 3. ConceptsMSI-X PBA Offset(hex)Same as MSI-X Table Offset, but indicates the Base Address Register offset forthe MSI-X PBA rather tha

Editors Chapter 3. ConceptsGen 3 Equalization PageThis page contains all the options that govern Gen 3 PCI Express equalization.PCIe Editor Gen 3 Equa

Editors Chapter 3. ConceptsFigure 3.46: PCIe IP Editor Gen 3 Equalization PageUG001 Rev. 5.0 - 5th December 2012 http://www.achronix.com 84

Editors Chapter 3. ConceptsROM Configuration EditorThe ROM configuration editor provides a simple graphical editor used to configure a ROM wrapperinstanc

Editors Chapter 3. ConceptsOverview PageThe Overview page contains all the properties that govern the structure and configuration of the ROMwrapper.Fig

Editors Chapter 3. ConceptsClock EnablePriorityThe Clock Enable Priority defines the priority of the outregce clockenable input relative to the rstreg